30 Years of DesignCon

The interconnect industry’s biggest gathering celebrated its 30^th anniversary this year. Technologist Bob Hult has attended every one of them. Here’s what captured his attention this year.

DesignCon 2025 marked the 30^th anniversary of this premier technical conference for designers of high-performance chips and printed circuit board systems. An increasing number of attendees are drawn by an extensive schedule of over 160 keynotes, panel discussions, bootcamps, tutorials, and technical sessions organized in 14 tracks covering such diverse topics as chip I/O modeling, designing 200G per lane channels, and electromagnetic compatibility. The number of exhibitors increased to 173, many of which featured live demonstrations of advanced chip fabrication, high-speed copper interconnects, as well as advanced test and measurement equipment. Electronic connector manufacturers have chosen DesignCon to introduce the latest innovations in this rapidly evolving industry and this year approximately 36 suppliers of connectors and cable assemblies exhibited.

DesignCon’s focus has been on high-performance electronics and the latest advances in achieving higher bandwidth, modeling, simulation, and testing high-speed circuits. The 2025 edition of DesignCon was no exception with presentations providing insight to designing 1.6 terabit channels and beyond. The ongoing effort to reduce power consumption is a key topic as power consumption of a hyperscale data center is projected to exceed that of a medium size city. Computer clusters designed to support artificial intelligence are driving demand for increasing connector performance and were the focus of many new products and technologies at DesignCon this year.

The elephant in the room was the announcement of DeepSeek on the Monday before DesignCon opened. A Chinese start-up has apparently developed an AI-capable model using far fewer chips, which has upended the prevailing view that bigger machines that draw enormous amounts of power are required to support AI workloads. The announcement shocked the industry, dropping the value of stocks of advanced chip manufacturers, and upset plans for massive increases in power generation resources. It seriously shook the assumption of U.S. leadership in AI. It is too early to determine if DeepSeek will result in an inflection point in AI system architecture but, if proven, it could become a major technology disrupter. Discussion of DeepSeek was rampant on the exhibition floor, with most attendees taking a wait-and-see attitude.

Exhibits on the expo floor reflected ongoing efforts to enable electronic circuits to support the requirements of next generation computing equipment. Pushing the perceived bandwidth and reach limitations of copper enables engineers to continue working with familiar design, test, and manufacturing processes, often at lower cost than optical alternatives. Continuing advances were evident at many expo booths. Last year a few prototype 224G PAM4 channels were demonstrated. This year live 224G PAM4 channels were prominently demonstrated by multiple suppliers. The Molex booth captured this theme with “Harnessing the Potential of 224G.”

Additional technologies, trends, and products seen at DesignCon 2025 include:

• Leading connector suppliers prominently displayed their unique cable backplane solutions. The cable backplane has evolved from a tiny niche application to an important system packaging option that is ideally suited to support the needs of large AI computing clusters. The reach and crosstalk limitations of large copper backplanes at 224G and future 448G channels make cable backplanes the only viable solution.
• Several demonstrations of 200G per lane were supported by technical papers addressing design and test techniques to achieve reliable channels.
• The current race to advance AI technology presents an unprecedented business opportunity to connector manufacturers. AI computing clusters consist of a network of networks with every device connected directly to every other device via high-speed, low latency links. This is music to the ears of connector and cable assembly suppliers. They are offering a menu of solutions that range from low-cost direct attach cables to several levels of active electrical cables as well as active optical cables to address reach, performance, and cost objectives.
• Interest in bus bar power distribution is being driven by design of AI racks that draw over 100kW. Distributing this level of electricity to each shelf in a rack is becoming increasingly difficult. The TE Connectivity booth demonstrated a bus bar that includes a channel for circulating cooling fluid to significantly increase the current capacity of the bus bar. There has been some discussion about replacing the standard 48VDC with 400VDC, which would improve efficiency but would introduce human hazard issues.
• Adoption of liquid cooling is growing as the power consumed by processors, switches, and accelerators continues to increase. Cold plate technology is the preferred solution, at least for the short term, as it requires the least amount of infrastructure modification and can be focused on specific problem devices. Immersion cooling offers greater efficiency but will require major changes in data center design as well as infrastructure. A connector submerged in cooling fluid will require adjustment of its electrical characteristics. Several connector manufacturers demonstrated connector compatibility with liquid cooling.
• Connector designs continue to be refined to deliver higher performance. Compliant pin termination technology, often utilized in backplane connectors, is being replaced with surface mount or micro compressive spring contacts mating to gold pads on the surface of the backplane. Continuing reduction in pin size and centerlines makes drilling and plating holes impractical. Very short compression springs to a pad offers improved high-speed electrical performance. Two-piece mating contacts are being fine-tuned to reduce stubs while ensuring that adequate wipe is maintained. Accurate fabrication of PCBs becomes more critical as excessive board warp may reduce wipe and contact reliability.
• Many exhibitor booths featured products compatible with PCIe Gen 6.0 including operating channels conforming to the preliminary Gen 7.0 specification. Gen 7.0 doubles the data rate to 128 Gb/s per lane and represents a significant challenge to designers. Multiple technical presentations provided insight into implementing Gen 7.0 as well as a possible future optical version.
• Last year there was little interest in exploring any modulation beyond PAM4. Multiple discussions this year revealed serious consideration of adopting PAM6 or PAM8 as necessary to achieve next generation data bandwidth targets. Both modulations have advantages and challenges, which are expected to be hot topics of discussion over the coming year.
• Linear optical pluggables are going mainstream due to potential reduction in energy and cost. Suppliers will be offering multiple configurations to closely match specific applications. A standard that will enable plug compatibility among a variety of equipment is expected at OFC in April 2025.
• The continuing trend of disaggregation in the data center is generating demand for high-speed, low latency cable assemblies that range from direct attach to active optical. Cable assembly suppliers are responding with good, better, and best solutions.
• Leading connector manufacturers featured several concepts of high-performance ASIC interconnects using copper twinaxial cables to replace transmission lines buried in the PCB. Co-packaged copper (CPC) is gaining attention as a less dramatic change from traditional architecture. Front panel pluggable QSFP-DD or OSFP connectors are directly terminated to twinaxial cables and are mounted near or on a switch substrate. Additional high-density surface mounted connectors link twinaxial cables with rear-panel mounted cable backplane connectors. This concept is similar to co-packaged optics (CPO), except it conveys signals via copper rather than optical fiber.
• The role of advanced materials in future connector design is expected to increase as engineers must find ways to squeeze higher performance from every mm of the channel. Improvements in shielding effectiveness, dielectric materials, low resistance, environmentally resistant plating, and plastics that enable challenging configurations and survive high processing temperatures while enhancing performance will be incorporated in new connector offerings.

Universal recognition of the critical importance of verifying signal integrity throughout the new system design process was demonstrated by the crowd of engineers lined up to get an autographed baseball cap from rockstar SI evangelist Eric Bogatin. The hats were emblazoned with “Rule #9,” a cardinal guide in testing for SI achievement.

Notable products and technologies from the four leading connector manufacturers

Amphenol Communications Solutions increased its commitment to DesignCon by raising its status to host and featured the largest booth at this year’s expo.

One exhibit showed a concept of an electrically active backplane cable assembly that integrates a retimer and/or redriver chip to enable very large cable backplane assemblies.

The ability to support 224 Gb/s PAM4 channels was illustrated by the Amphenol CS UltraPass OverPass near-chip cable assemblies and ExtremePort QSFP-DD 224G pluggable I/O connectors.

Paladin HD 224Gb/s backplane connector system can provide up to 144 differential pairs orthogonally in a 1U chassis.

Recognizing the need to maintain acceptable temperatures in tightly packed servers, Amphenol demonstrated a 2X8 OSFP belly to belly liquid cooled solution. Another demonstration showed a liquid cooling leak detection sensor.

Molex featured multiple interconnects including a demonstration of a 1-meter direct attach OSFP cable running at 224 Gb/s.

Inception backplane connector is rated to 224 Gb/s PAM4. Its genderless design and variable pitch density adds design flexibility to high-speed applications. Its surface attachment eliminates the need for drilling and plating precision PCB holes.

CX2 Dual-Speed near-ASIC two-piece connector and cable assemblies feature 64 differential pairs using 30 AWG twinaxial cable to complete the 224Gb link in chip to chip and switch to backplane applications.

Molex also showed an improved MMCX power over coax connector that assures stable interconnection in challenging applications.

The Samtec booth focused on 112G and 224G applications including co-package copper.

One example was a computer sled featuring Si-Fly HD connectors in near chip and on module applications using twinaxial cable to both a rear cable backplane and front panel pluggable I/O connectors. High density Si-Fly connectors deliver 170 differential pairs per square inch of board space.

Samtec has expanded well beyond its broad range of mezzanine connectors to offer innovative low /high speed and power interconnect solutions including both board mounted and Flyover® configurations.

Samtec’s investments in material science has enabled the ability to use smaller gauge twinaxial conductors to reduce cable bulk and increase flexibility. Smaller diameter coax permits the termination of higher connector contact densities.

The ability to perform physical tests on next-generation high-speed circuits is an essential step in the new product development process. The Samtec BullsEye® is a compression mounted precision coaxial connector that is rated up to 90 GHZ. The tail end of these cable assemblies are typically terminated in a 1.00 or 1.35 mm coaxial connector. A live demonstration consisted of a vector network analyzer measuring insertion loss of a device operating at up to 110 GHZ.

A Samtec cable backplane system demonstrated 112 Gb/s PAM4 signaling utilizing the NovaRay I/O®, Flyover® OSFP, Eye Speed® twinaxial cable, and a new NovaRay backplane connector.

The TE Connectivity booth featured multiple live demonstrations as well as design concepts to address emerging AI applications.

To further increase the thermal transfer capacity of its Thermal Bridge heat transfer plate, TE showed a circulating water cold plate designed to cool pluggable I/O connectors.

TE’s AdrenaLine 224G connector portfolio is designed specifically to support next generation AI GPU interconnect requirements including co-packaged copper applications. The portfolio includes near-chip connectors, cable backplane, cable I/O connectors, micro LGA sockets, and high performance 224G cable.

As computer rack energy demands exceed 100 kW, busbar power distribution systems become highly attractive. TE demonstrated a liquid-cooled busbar concept as an addition to its extensive line of busbar connectors.

TE and MultiLane teamed up to demonstrate testing of a large TE cable backplane assembly.

Once again, DesignCon showcased the enormous excitement and innovation being generated in support of AI and machine learning applications. With literally hundreds of billions of dollars projected to be spent on AI-related infrastructure in 2025, the next few years may well be remembered as the golden age of the electronics industry.

Look for Bob Hult’s upcoming review of OFC 2025 this spring and read his high-speed coverage, Tech Trends series, and more show reports in his Connector Supplier archives.

Like this article? Check out our other Artificial Intelligence, High-Speed articles, our Medical Market Page, and our 2024 and 2025 Article Archive. 

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