PAM4 Signaling Has Become the Preferred Way to Achieve 56+Gb/s Data Transfers

By Robert Hult | November 03, 2020

To address performance requirements for next-generation equipment, an ideal solution would be the ability to double the data throughput using legacy hardware. Replacing traditional NRZ signaling with PAM4 is exactly what the industry needs.

Design engineers have been dealing with the challenges of ever-increasing data rates for many years. Each iteration of computing equipment required improved performance to achieve design objectives. High-speed connector manufacturers collaborated with their leading-edge customers and chip manufacturers to find ways to enable cost-effective connectivity that can deliver a high degree of signal integrity with acceptable channel lengths. A combination of improved PCB laminate materials, optimized connectors, and advanced signal conditioning, along with enhanced PCB design and simulation techniques, have allowed system speeds to evolve from hundreds of megahertz to 50+Ghz. Even higher speeds are appearing in designer’s roadmaps for next-generation products. PAM4 signaling

Today, backplane connectors have been rated up to 56Gb/s non-return to zero (NRZ), while I/O connectors typically aggregate multiple lower speed channels to achieve higher throughput. The current crop of flagship backplane connectors has been optimized in terms of attenuation, crosstalk, skew, and signal density, but the models currently available may offer only limited potential for further performance improvements. The investment necessary to design and tool a new generation of high-speed connectors that may offer marginal improvement in performance does not make economic sense, and this is the likely reason we have not seen a new family of high-speed backplane connectors enter the market for at least five years. Few design engineers are willing to even offer a guess at the ultimate practical bandwidth of copper connectors. Fiber optic interconnects have been waiting in the wings for years but concerns over cost and power consumption have prevented broad adoption. Recent advances in silicon photonics may be changing that calculation.

In order to address performance requirements for next-generation equipment, an ideal solution would be the ability to double the data throughput using legacy hardware. Engineers would be able to utilize their experience with existing connectors and avoid suffering through a learning curve with a new connector family. Project managers prefer staying in their comfort zone to minimize design time and risk. Electronic equipment manufacturers could continue to use existing tooling and documented processes. Installed equipment could be upgraded in place by repopulating an existing backplane with next-generation daughtercards. Replacing traditional NRZ signaling with four-level pulse amplitude modulation (PAM4) is exactly what the industry was looking for.

NRZ vs. PAM4 signaling - eye diagrams

Unlike NRZ encoding, which provides only two bits per clock cycle, PAM4 features four bits per cycle. For a given clock frequency, PAM4 doubles the bandwidth of the channel. The result is that a channel operating at 25Gb/s channel can deliver 50Gb/s of data. This is the best gift the industry could hope for, given the combined pressure of increasing data rates, adversity to risk, and reduced cost.

The advantage of doubled data throughput introduces additional design issues that must be addressed to insure reliable performance. Because PAM4 puts tighter spacing between voltage levels, a PAM4 signal has less signal-to-noise margin and more inter-symbol interference (ISI) than an NRZ bitstream for the same clock rate. This makes detection more difficult. Shorter unit intervals result in faster rise and fall times, which aggravates crosstalk, which only gets worse with distance. Differential and common mode interference also increases.

The bit error rate (BER) of a PAM4 channel may increase due to random noise induced along with the link. Overcoming intersymbol interference (ISI) and reducing BER in a PAM4 channel may require equalization at the receiver end and pre-compensation at the transmit end, both of which consume more power and generate more heat. Clock recovery is more difficult and use of PAM4 modulation may result in more inter-pair skew, jitter, and return loss. New design test and verification tools are required with relatively few established standards to check against.

In spite of these challenging issues, PAM4 has become the preferred way to achieve 56+Gb data transfers in both copper and optical channels.

56G PAM4 serializer-deserializers (SerDes) have entered the market. Avago Technologies has demonstrated a 56Gb/s PAM4 SerDes for copper backplanes and optical interconnects, targeting next-generation switches and routers. Credo Semiconductor demonstrated its single lane 112G PAM4 short reach (SR) solution and long reach (LR) 56Gb/s PAM4 at a recent technology symposium. Anritsu has published a white paper discussing the equipment and process required to test 400Gb/s Ethernet channels. Intel sees PAM4 signaling as a key technology to enable next-generation computers to efficiently support the transfer of zettabytes of expected annual data traffic.

PAM4 is being implemented in many 25+Gb/s signaling schemes and most 50+Gb/s standards. Standards organizations and special interest groups, including OIF and Ethernet, are getting on the bandwagon. The 400GbE Ethernet task force (802.3bs) also adopted PAM4 based on 8 x 53.125Gb/s signaling.

Live channel demonstrations using PAM4 technology were ubiquitous at DesignCon 2020. Leading backplane connector manufacturers showed backplanes running both 56Gb/s NRZ and PAM4 signaling at 112Gb/s over three meters of cable. It will be interesting to see what is displayed at DesignCon 2021. It has become necessary to determine NRZ or PAM4 signaling when comparing connector performance ratings.

The adoption of PAM4 signaling opens the door to higher speeds without a forklift in basic interconnect hardware, but this technology introduces its own challenges to successful circuit design. There has been some discussion regarding the use of PAM6 or PAM8 modulation, but with no clear consensus. The next big question the industry must grapple with is determining the data rate at which optical signaling becomes the only practical solution.

Like this article? Check out our other high-speed, PAM4, and standards articles, our Datacom/Telecom Market Page, and our 2020 and 2019 Article Archives.

Robert Hult
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