The COM-HPC Embedded Standard Will Facilitate High-Performance Computing

By Caroline Hayes | January 28, 2020

To handle compute-intensive applications and edge-computing systems, a revised Computer on Module (COM) standard is required.

At electronica 2018, Samtec and congatec introduced the concept of a new Computer on Module (COM) standard. Initially called COM-HD, it has been developed by PCI Industrial Computer Manufacturers Group (PICMG) and re-named COM-HPC to reflect the high-computing performance demanded by 5G networks, artificial intelligence, and increased automation.

DH Electronics’ DHCOM Computer-on-Module. (Image Credit: Pe wiki editor [CC BY-SA])

In October 2019, PICMG issued a pre-release of the pin-out and mechanics of COM-HPC. The standard is due to be ratified in the first half of 2020 and Jessica Isquith, president of PICMG, confirmed that this is on track, adding “a number of milestones have already been reached.”

Jessica Isquith, President of PICMG

Hardware Specification

The first of these milestones is pin-out. The hardware specification has two connectors with 400 pins each for a total of 800 pins — nearly double the 440 pins of COM-Express. COM-Express defines a family of Small Form Factor (SFF) and Computer-on-Module (COM) single board computers that can be used as standalone products or as a processor mezzanine that can be plugged onto a base board. COM-Express received its third revision in 2017, which provides for the addition of up to four 10GbE interfaces on the board and increases the number of PCI Express lanes to 32, greatly expanding connectivity and interface options.

“Processor and I/Os are getting faster, but today the fastest is Gen 3 and we have three more generations to be supported with this connector,” said Christian Eder, chairman of the COM-HPC committee. PICMG’s COM-HPC sub-committee includes Samtec, Amphenol, TE Connectivity, and ept.

Christian Eder, Chairman of the COM-HPC Committee

“The connector is fully specified for PCI Express Gen 5 and there is a high probability that even PCI Express Gen 6, which is not even released, will be supported. This means we are seeing the freedom to support multiple generations of upcoming, new technologies,” he enthused. It is compliant with 10G and 25G Ethernet and operates at up to 300W at 11.4V to 12.6V. Although there are no benchmarks to date, this level of power consumption means that much faster CPUs can be supported.

The high-density connectors are available from multiple vendors. A distinctive characteristic of COM-HPC is that the connector uses a Ball Grid Array (BGA) termination. It therefore has no grid areas for mounting and is self-centering during soldering, said Eder. “It is important to have good alignment, of course, but the reason we decided on this connector was the high pin count.” The carrier board connector is also available in two stack heights, 5mm and 10mm, to give developers freedom over the population of the carrier board.

The COM-HPC connector is the first to use a BGA termination.

Preparing for Launch

PICMG recognizes the importance of signal integrity and addresses the challenge of higher signal frequencies through interface revisions. COM-HPC uses Samtec’s Edge Rate contact system, which is optimized for signal integrity, minimizes broadside coupling, and reduces crosstalk in high-speed, high-cycle applications.

The Edge Rate® was chosen for signal integrity.

The specification defines COM-HPC client type and COM-HPC server modules. The client type is for typical embedded applications such as industrial automation, transportation, and medical equipment, which are compute and memory-intensive.

The server type is designed for edge computing, where the data must be processed by edge servers because public networks do not have the bandwidth to transmit and perform analytics. Artificial intelligence (AI), surveillance, and industrial automation are common applications that require the processing of large amounts of data. The server option is also designed for harsh environments, where it may be subjected to extremes of heat or cold, shock, vibrations, or electromagnetic interference. COM-HPC server modules have up to eight DIMM sockets for up to 1TB of RAM.

Demand for Analytics

In more conventional computing applications, there is also a drive to process more data for analytical use to benefit an enterprise as well as its customers. A recent report by the Enterprise Strategy Group found that updating servers helped businesses by providing more data that is usable within its analytics environment. Analytics, in turn, helped the organization’s customer base increase spending and uncover new markets. Data is also the basis for R&D and risk management and can be used to make data-driven decisions.

The complexity of edge computing means that signal integrity and management software need to be defined and addressed. A PICMG subgroup has been established to develop signal integrity. It will define the routing rules for new high-speed signals. “The faster a signal goes, the more complicated the layout will be, or the shorter the distance it can be transmitted in copper,” explained Eder. Another group will define the software stack required for management functionalities for the server role.

To address communication at the edge, the standard has a maximum of eight 25GbE lanes to support 26GbE operation.

Interfaces

COM-HPC also significantly increases interface capacity. It doubles COM-Express’ 32-lane PCI Express lanes to 64 to increase throughput and allow for parallel processing in servers, automotive, transportation, visualization, and AI applications. For the client type, the inclusion of two MIPI-CSI (Mobile Industry Processor Interface – Camera Serial Interface) allows for extensive imaging tasks that are expected in surveillance cameras and other visualization tasks. FPGA accelerator cards can be used to create heterogeneous structures.

COM-HPC nearly doubles the pin count, compared with COM Express.

Power consumption is 300W with COM-HPC, compared with 60W maximum for COM Express, which means faster CPUs can be supported. The standard is also expected to accommodate up to 80 full-size memory sockets to provide up to 1TB of DRAM. “It’s going to be expensive, but it’s possible,” said Eder.

The standard is based on interface definitions, which means it is not reliant on a single chip maker. Embedded Application Programming Interfaces (APIs), introduced with COM Express, allow unified access to a selection of interfaces, such as the popular I²C bus, said Eder.

It is also flexible; modules can be exchanged independently of the carrier board for upgrades or even to change technologies from one chip vendor to another, or to change the module supplier. Board Management Controllers allow developers to offer edge server functions, such as choosing to boot from a network rather than from a local drive.

The standard offers a shorter time to market, less risk, and vendor independence, said Isquith. It allows development to be faster and more focused on an application. Module users will still create their own carrier boards with specific functionalities and software IP, explained Eder, but they can start implementing it without reinventing the wheel.

The standard, scheduled for release in the second half of this year, will enable developers to introduce COMs in applications where they were not feasible before, principally AI and extensive edge computing. The PICMG is keen to point out that it is not intended to replace COM Express but it does extend the principle of the Server-on-Module (SOM). The final design guide is expected in the first half of 2020.