Return to Normal: DesignCon 2023
After two years of pandemic disruption, this year’s high-speed trade show rebounded with an impressive array of smaller, cooler, and faster than ever interconnects.
The 28th edition of DesignCon convened at the Santa Clara Convention Center January 31 through February 2, marking the return to its traditional venue and time slot. Concerns that recent tech industry layoffs could impact attendance levels did not materialize as traffic appeared to reach pre-pandemic levels throughout the conference. Featuring 160 technical sessions over 16 tracks, topics ranged from tutorials on signal integrity to the design of quantum computing hardware. Many technical sessions were standing room only with active question and answer opportunities to discuss specific issues. Hot topics included design considerations of 200 Gb/s channels, emerging co-packaged copper and fiber technology, power reduction strategies, thermal management, I/O panel bandwidth density, and the standardization of 112 Gb/s and 224 Gb/s channels.
A number of trends discussed in the technical sessions were supported and, in some cases, demonstrated by manufacturers participating in the two-day expo.
- Data rates are nearly doubling every two years. Last year, vendors demonstrated 112 Gb/s PAM4 channels and debated if 224 Gb/s PAM4 channels were feasible. This year, multiple booths featured hardware platforms that can deliver 224 Gb/s PAM4 performance. This is being done by taking these high-speed signals out of the PCB and transitioning them to twinaxial or coaxial copper cables. All the major connector manufacturers now offer a version of this over-the-board technology. Engineers have recognized that even the best performance and high-cost PCB laminates introduce excessive insertion loss above about 40 Ghz. Cable manufacturers are fine-tuning their cable design using advanced dielectrics and improved shielding to minimize conductor size and maximize reach. Connector manufacturers are introducing new low-profile, high-density twinax to PCB connectors that can be mounted immediately adjacent to a high-performance ASIC and terminate directly to a pluggable transceiver socket. The emphasis at DesignCon was on copper solutions in high-speed circuits, while fiber optic alternatives that offer much higher bandwidth and reach will be the focus at the upcoming OFC conference coming in March.
- Simulating high-speed channels is becoming more challenging and expensive. Verifying signal integrity (SI) is an essential aspect of every new system design, but the number of experienced SI engineers especially at smaller companies is limited and the necessary equipment and software has become prohibitively expensive. This is an ongoing problem and will only exacerbate as data rates continue to rise.
- Near-package and co-packaged copper and optics (CPO) is a next-generation Ethernet technology that will enable continued support of high-speed switches in the data center. It offers higher interconnect bandwidth density, lower power consumption, and a degree of “future proofing.” CPO potentially could eliminate retimers, conserving space and reducing power and cost. Several technical sessions reviewed the many issues that must be addressed before this technology can go mainstream, including the standardization of the transceiver socket, thermal management, fiber or wire management, external or internal laser, and field repairability. OIF has published a framework document to define the basics of this technology and identify the areas that need resolution. The 3.2 Tb module is targeting 51 Tb data center switch applications.
- Multiple technical sessions and booth displays featured hardware and support for PCIe 5.0, 6.0, and anticipated 7.0 specifications. Clearly, PCIe has regained momentum and is positioned to remain a primary I/O expansion bus protocol. Although they are not directly competitive, I did not see any displays promoting GEN-Z other than the connectors that are compatible with that specification.
- Efficient power distribution remains a critical issue in large system design. Many Expo displays featured low-loss cable, connector, and bus bar interconnect systems. A developmental product from TE Connectivity adds a thermal sensor to its Crown Clip busbar interconnect system. It is designed to sense overheating and sends an alarm signal via the busbar. This is an example of a trend toward data center automation by making the infrastructure “smart” enough to identify a problem before it becomes a catastrophic failure.
- In addition to the adoption of PAM4 modulation, engineers are doing whatever they can to extend the bandwidth and reach of copper cables at higher frequencies. Several displays demonstrated three-to-five-meter 112 Gb/s channels using both passive and active copper cables. A combination of improved cable construction and materials is pushing the reach limitations of just a few years ago.
- When asked the question, several representatives of connector companies waffled on the possible adoption of PAM6 or PAM8 at some point in the future. A year ago, the answer was a definite no. If bandwidth growth continues at the current trajectory, increasing the modulation rate may become essential.
- Although much anticipated, a specification for the OSFP-XD pluggable transceiver was not released at DesignCon and may not be ready for publication at OFC in March. Several major connector manufacturers indicated they are committed to tooling this new high-density interface but are waiting for release of the final specification. It is unclear if OSFP-XD will be the last iteration of the pluggable platform due to bandwidth, thermal, and panel density limitations.
- Although there were a few new interfaces displayed at expo booths this year, the emphasis seemed to be focused more on leveraging past experience with current flagship product families to upgrade performance incrementally, rather than take a quantum leap in performance. This likely reflects the fact that the majority of current systems are operating in the 12 Gb/s to 56 Gb/s range and it will likely be years before 112/224 Gb/s PAM4 channels will be required in volume production. Fine tuning an existing interface supports current performance demands while demonstrating a migration path to support next-generation equipment makes sense. It will be interesting to see if an upgraded family of high-speed backplane connectors are introduced or if a new class of interfaces will rise to meet next-generation needs.
- Standards organizations including IEEE, OIF, and Ethernet are actively creating 224 Gb/s PAM4 electrical specifications that define performance in a variety of short-reach applications.
- Equipment designed to support artificial intelligence and machine learning applications apparently requires a unique architecture that will open design opportunities for miniature high-speed board-to-cable connectors.
Over 90 hardware, software, and service providers participated in the two-day DesignCon expo. Some of the highlights included:
The theme of the large Amphenol Communications Solutions booth was “Building the 224G Ecosystem” and demonstrations included an up to one meter chip-to-chip twinax cable using an Ardent substrate connection running at 224 Gb/s PAM4.
A 112G PAM4 link connecting two OverPass DensiLink connectors mounted close to an ASIC included an OSFP800 direct-attach cable assembly.
The increased reach of active electrical cables was demonstrated by up to five meters of 800 Gb retimed Ethernet through QSFP-DD 800 and OSFP 800 pluggables.
Molex returned to participate at DesignCon 2023 after a COVID-19 hiatus with a large booth focused on next-generation 112 platforms. Demonstrations included BiPass twinax cables mounted near a 800G switch to OSFP belly-to-belly and vertical mount OSFP-DD connectors.
Molex also showed a 1.4-meter passive cable linking two mid-board ASIC connectors running at 112G PAM4.
The Molex booth highlighted a variety of power distribution solutions applicable to data center applications.
Molex has recently tooled a configuration of the External Laser Source Interconnect System (ELSIS) to address evolving co-packaged optic applications.
Samtec demonstrations focused on the multiple solutions they offer for interconnecting 112G and 224G channels with emphasis on Flyover technology using NOVARAY I/O, ExaMAX, and SI-FLY product families.
A proof-of-concept device adds decoupling chip capacitors to a power interposer, to minimize inductance. Rather than mounting chip caps on or under the main PCB, this concept shortens the distance between the caps and the processor. The 10 mm stack height EPIC is said to reduce inductance by over 300% and is a perfect example of a value-added proposition that improves performance.
Another demonstration showed 16 NOVARAY I/O panel mounted connectors, each loaded with 32 differential pairs and operating @ 100 Gb/s PAM4. This configuration is capable of delivering 1.6 Tb/s through a new EPIC connector that includes embedded bypass capacitors mounted under the ASIC module for improved power integrity..
NOVARAY cable assemblies can also be used for high-speed external interconnects.
Another display compared the panel densities of NOVARAY I/O on the right, QSFP in the middle and OSFP on the left, each delivering 128 channels.
Samtec also demonstrated 54 copper 224 Gb/s PAM4 differential pairs using proof of concept SI-FLY Gen 2 connectors and 32-gauge cable assemblies designed for up to 200 Gb/s per pair.
Samtec offers FireFLY, NOVARAY, ACCELERATE, and ACCELERATE HP to support mid-board / near-package copper and fiber optic applications.
TE Connectivity featured a broad selection of interconnects that ranged from power distribution to 224Gb PAM4 signaling. The TE booth also included the industry’s first demonstration of a 0.8 meter OSFP 1.6 Tb passive direct attach copper cable running at 200Gb per lane.
A large display board demonstrated the company’s commitment to supporting PCIe 6.0 applications, including a new cable riser system that enables extensions and optimizes PCB board space as well as custom PCIe cable assemblies.
Another display demonstrated a 112 Gb PAM4 over-the-board copper interconnect linking a 3.2 Tb co-package ASIC to a fully populated array of OSFP connectors.
Intel partnered with TE to showcase its first 224 Gb PAM4 transceiver using a new TE AdrenaLINE Catapult near-chip connector and direct attach OSFP copper cable.
TE is deeply involved in the standardization of co-packaged copper and fiber interconnects. They displayed a prototype of a separable transceiver socket that OIF has proposed for industry adoption.
Cable backplanes are a niche application but make sense where traditional copper PCB backplanes cannot support required bandwidth or reach. Hybrid configurations that convey only high-speed signals via cable reduce the complexity and cost of a cable backplane. A TE demo also utilized the AdrenaLINE Catapult 200G per channel cable to near-chip interconnect.
Additional exhibits included PCIe 6.0 using one-meter CDFP direct-attach cable assemblies for external applications, and prototypes of the OIF proposed CPO transceiver chicklet socket and plug.
Additional suppliers exhibiting recently released products included Southwest Microwave with a new seven position 90° and stacking coaxial board-to-board connector which is rated to 40 Ghz.
US CONEC featured the Very Small Form Factor MMC high-density fiber optic connectors that are available in a 1X16 and 2/12 configurations using their novel TMT ferrule technology.
Yamaichi Electronics released the OSFP-VLC connector designed for vertical line card applications. Orienting the line card reduces signal trace lengths, potentially improves cooling, and reduces cost.
DesignCon 2023 represented a much-appreciated return to normalcy after years of disruption while lighting the path to next-generation chip, board, and interconnect innovation.
See Bob Hult’s coverage of DesignCon 2022, DesignCon 2021, and other technology trends.
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