DesignCon 2016: Chipheads Assemble!

By Contributed Article | January 18, 2016

The connector industry is descending on Santa Clara this week to take part in the top trade show for chip, board, and systems design engineers. Here’s a look* at what DesignCon 2016 has in store for this year’s conference attendees.



It’s that time of year again, when Santa Clara’s rumored vampire packs clear out to make room for the electronic industry’s component manufacturers and design engineers. Now in its 21st year, DesignCon is the premier conference for chip, board, and systems design engineers in the high-speed communications and semiconductor communities.

Kicking off on Tuesday, January 19, in Santa Clara, Calif., DesignCon brings engineers the latest theories, methodologies, techniques, applications, and demonstrations on PCB design tools, power and signal integrity, jitter and crosstalk, high-speed serial design, test and measurement tools, parallel and memory interface design, ICs, semiconductor components, and more. The DesignCon Technical Conference Program consists of 14 tracks with more than 100 technical paper sessions that cover all aspects of electronic design, from chips through boards and systems.


Always a favorite of connector manufacturers and systems design engineers alike, this year’s conference program will feature new offerings as well as favorite traditions. The big launch surrounds DesignCon’s Bootcamps – all-day workshops that focus on power integrity and signal integrity and feature industry gurus as the instructors.

“Why bootcamps you might ask? DesignCon is known for its technical depth and opportunities to discuss how to solve the most gnarly high-speed design problems,” says Janine Love, DesignCon technical program director. “For those new to signal integrity and power integrity – not necessarily new to engineering but new to these concerns – DesignCon could feel a bit like drinking from a fire hose. So I worked with some of our DesignCon community leaders to develop these bootcamps to ease the way into the subject matter or offer a chance to brush up on some skills. I am really looking forward to seeing how they go.”

Need to consider signal integrity in your designs? Are you intrigued by the advanced signal integrity topics covered at DesignCon but feel you need a bit more to get up to speed? The Signal Integrity Bootcamp will be led by renowned signal integrity expert and educator (and dean of the Signal Integrity Academy), Eric Bogatin. The program is designed to give experienced engineers the knowledge they need about signal integrity and introduce new engineers to the concept.

The Power Integrity Bootcamp will be led by industry experts Steve Sandler and Heidi Barnes. It focuses on a holistic approach to the system with particular emphasis on how the power supply impacts system performance.


This year’s keynotes will cover the full engineering lifecycle, from concept and creativity to testing and securing, as well as offer tips for entrepreneurial success.

Al Eisaian, CEO IntelinAir

Al Eisaian, CEO of IntelinAir, an aerial information analytics firm and the fifth company he has co-founded, will present “The Key Building Blocks to Surviving/Thriving in the Era of Exponential Technologies,” on Tuesday, January 19, at noon. With a rich entrepreneurial history, Eisaian’s career and expertise has run the engineering gamut: He began as a hardware test engineer and advanced through product and business unit management.


Pat Byrne, president, TektronixPat Byrne, president of Tektronix, will speak on how to “Reduce Time to Market with Better Workflow Integration from Simulation to Test,” on Wednesday, January 20, at noon. With more than 24 years of experience in the test and measurement industry as both a technologist and a business leader, Byrne has held leadership positions in everything from market and business development to R&D, technology development, marketing, and more.


Paul Kocher, RambusFinally, Paul Kocher, chief scientist, Cryptography Research Division at Rambus, will discuss “Silicon Foundations for Security,” on Thursday, January 21, at noon. An acclaimed data security researcher and entrepreneur, Kocher is credited with co-authoring the widely used SSL 3.0 standard, discovering side-channel cryptanalysis, and leading the development of differential power analysis security countermeasures built into nearly 10 billion chips made annually.


Paper Presentations

As usual, DesignCon has planned a full schedule of cutting-edge paper presentations, panels, and tutorials (the best of which will be honored at the Best Paper Awards on Wednesday, January 20, at noon). Interconnect-focused presentations include:

  • David Brunker, technical fellow at Molex, and other industry experts in a panel discussion entitled “Getting Smooth Copper and Keeping It” on Thursday, January 21, at 3:45
  • Samtec’s 40-minute technical papers (including “Deep Channel Analysis for 28Gb/s and Beyond” and “Cost-optimized 28G/56G PAM-4 Backplanes”), as well as a 75-minute panel discussion on optics versus copper for in-chassis connections at 56 – 112Gb/s and a three-hour tutorial on modeling dielectrics and conductors for interconnects
  • Hirose SI engineers’ paper on tradeoff between tightly and loosely coupled differential vias for multi-Gb/s design on Wednesday, January 20, at 9:20

Mix, Mingle, and Network

Other not-to-be-missed events include:

Welcome Reception

Tuesday, January 19, 6 p.m.

Step back into the Roaring Twenties and party like it’s 1929! Enjoy beer, wine, heavy appetizers, and dance the night away to a live band at a speakeasy. The verbal password at the door is “insight.”

DesignCon Best Paper Awards

Wednesday, January 20, at noon

Happy Hour

Wednesday, January 20, at 5 p.m.

Welcome Reception

Wednesday, January 20, at 6 p.m.

DesignCon Engineer of the Year Award

Thursday, January 21, at noon

Happy Hour

Thursday, January 21, at 5 p.m.

chipheadLast but not least, don’t miss your chance to memorialize your good times with old colleagues and new friends at this year’s brand-new DesignCon photo booth located in the lobby. There will be a trunk full of props to choose from – fedoras, boas, etc. – and DesignCon’s own mascot, Chiphead. (Send us your photos and we’ll put them on our site!)

“DesignCon is where designers go to look for leading-edge component solutions for their next-generation products,” said David Chen of Neoconix. “This is where ideas and discussion start.”

For a complete list of conference sessions, click here.

*Be sure to check out the second part of this show guide on Wednesday when we look at the exhibiting suppliers and their latest launches!


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