Anritsu Extends 4Tap Emphasis to 32 Gb/s for High-Speed Interconnect Design Evaluation

By Cable Assembly Supplier | November 11, 2013

Anritsu Extends 4Tap Emphasis to 32 Gb/s for High-Speed Interconnect Design Evaluation

Anritsu Company introduced a 32Gb/s extension option for its MP1825B 4Tap Emphasis that features industry-leading Tr/Tf speeds and low jitter for up to four taps, allowing it to create emphasis that matches every industry standard. The MP1825B with the new option can be configured with the Anritsu MP1800A BERT signal quality analyzer to accurately measure the performance of high-speed interconnects used in Next Generation Network (NGN) applications in a cost- and time-efficient manner.

To shorten development time, the MP1825B control software automatically calculates the optimum emphasis settings based on S21 parameters created from measurements taken with a vector network analyzer (VNA) or with a simulator using the Emphasis Optimization function. The software, combined with the overall high performance of the MP1825B, helps to ensure precise measurements while reducing test time.

Signal integrity engineers designing high-speed backplanes, cables, and interconnects can benefit from the inherent advantages of the MP1825B 4Tap Emphasis to verify the performance of their products. It supports easy changes to the pre-emphasis waveform amplitude, offset, and amplitude of each tap for effective evaluation of high-speed interface characteristics. Because each tap can be changed independently, the effect of pre-emphasis can be confirmed with high precision.

Designed with a compact remote head, a shorter cable can be used to connect the MP1825B to the device under test (DUT) to ensure high signal quality by minimizing cable effects. In addition to being compatible with the Anritsu MP1800A BERT, the MP1825B can be used with other BERTS, as well as customer devices and signal sources.

The MP1825B matches the high performance of the MP1800A BERT in signal integrity applications. The MP1800A features an internal pulse pattern generator (PPG) and high-input-sensitivity error detector (ED) module, each of which can be configured with one-, two-, or four-channels to support multi-channel synchronization of up to eight channels at 32 Gb/s. The MP1800A BERT also has a built-in jitter modulation source for generating various jitter types, including SJ, RJ, BUJ, and SSC.

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